CSU HAYWARD
DEPARTMENT OF MATHEMATICS AND
COMPUTER SCIENCE
COLLOQUIUM
Friday, June 11, 2004; Noon-1pm Sc N321
Speakers: Deepashree Krishnamurthy and Zhehua Wu, CS Graduate Students
Graduate Student Computer Architecture Projects
CS 6430 students prepared class projects implementing various architectural features of the MIPS RISC machine. Students implemented caches, co-processors, interrupts, floating-point, integer multiplication and division, and pipelining. Each prepared an assembly language bench-mark to demonstrate the feature(s) that they implemented. All projects were implemented using the LogicWorks schematic editor/ simulator. Two outstanding projects will be presented. This class was taught by Professor Roger Doering.
Deepashree Krishnamurthy
Two additional pipeline stages were added to the base design bringing it
to a full five level pipeline.
Zhehua Wu
Zhehua implemented a co-processor zero, interrupts, system calls,
program memory cache, and a simulated disk drive.
Pizza and soda will be served for those attending!